Proceedings, International Test Conference 1996

Proceedings, International Test Conference 1996
Author:
Publisher: Conference
Total Pages: 994
Release: 1996
Genre: Computers
ISBN:

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ITC is the World's largest premier technical conference on the testing and total quality of integrated electronics and the assenblies and systems that are based on them.

Proceedings

Proceedings
Author:
Publisher:
Total Pages: 225
Release: 1997
Genre:
ISBN: 9780780332430

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Wafer-Level Testing and Test During Burn-In for Integrated Circuits

Wafer-Level Testing and Test During Burn-In for Integrated Circuits
Author: Sudarshan Bahukudumbi
Publisher: Artech House
Total Pages: 198
Release: 2010
Genre: Technology & Engineering
ISBN: 1596939907

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Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing. Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constraints. Moreover, this unique book helps practitioners address the issue of enabling next generation products with previous generation testers. Practitioners also find expert insights on current industry trends in WLTBI test solutions.

Failure Analysis of Integrated Circuits

Failure Analysis of Integrated Circuits
Author: Lawrence C. Wagner
Publisher: Springer Science & Business Media
Total Pages: 256
Release: 2012-12-06
Genre: Technology & Engineering
ISBN: 1461549191

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This "must have" reference work for semiconductor professionals and researchers provides a basic understanding of how the most commonly used tools and techniques in silicon-based semiconductors are applied to understanding the root cause of electrical failures in integrated circuits.

Electronic Design Automation for IC System Design, Verification, and Testing

Electronic Design Automation for IC System Design, Verification, and Testing
Author: Luciano Lavagno
Publisher: CRC Press
Total Pages: 773
Release: 2017-12-19
Genre: Technology & Engineering
ISBN: 1351830996

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The first of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, Electronic Design Automation for IC System Design, Verification, and Testing thoroughly examines system-level design, microarchitectural design, logic verification, and testing. Chapters contributed by leading experts authoritatively discuss processor modeling and design tools, using performance metrics to select microprocessor cores for integrated circuit (IC) designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more. New to This Edition: Major updates appearing in the initial phases of the design flow, where the level of abstraction keeps rising to support more functionality with lower non-recurring engineering (NRE) costs Significant revisions reflected in the final phases of the design flow, where the complexity due to smaller and smaller geometries is compounded by the slow progress of shorter wavelength lithography New coverage of cutting-edge applications and approaches realized in the decade since publication of the previous edition—these are illustrated by new chapters on high-level synthesis, system-on-chip (SoC) block-based design, and back-annotating system-level models Offering improved depth and modernity, Electronic Design Automation for IC System Design, Verification, and Testing provides a valuable, state-of-the-art reference for electronic design automation (EDA) students, researchers, and professionals.