Wide Bandgap Power Semiconductor Packaging

Wide Bandgap Power Semiconductor Packaging
Author: Katsuaki Suganuma
Publisher: Woodhead Publishing
Total Pages: 242
Release: 2018-05-28
Genre: Technology & Engineering
ISBN: 0081020953

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Wide Bandgap Power Semiconductor Packaging: Materials, Components, and Reliability addresses the key challenges that WBG power semiconductors face during integration, including heat resistance, heat dissipation and thermal stress, noise reduction at high frequency and discrete components, and challenges in interfacing, metallization, plating, bonding and wiring. Experts on the topic present the latest research on materials, components and methods of reliability and evaluation for WBG power semiconductors and suggest solutions to pave the way for integration. As wide bandgap (WBG) power semiconductors, SiC and GaN, are the latest promising electric conversion devices because of their excellent features, such as high breakdown voltage, high frequency capability, and high heat-resistance beyond 200 C, this book is a timely resource on the topic. Examines the key challenges of wide bandgap power semiconductor packaging at various levels, including materials, components and device performance Provides the latest research on potential solutions, with an eye towards the end goal of system integration Discusses key problems, such as thermal management, noise reduction, challenges in interconnects and substrates

Power Electronic Packaging

Power Electronic Packaging
Author: Yong Liu
Publisher: Springer Science & Business Media
Total Pages: 606
Release: 2012-02-15
Genre: Technology & Engineering
ISBN: 1461410525

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Power Electronic Packaging presents an in-depth overview of power electronic packaging design, assembly,reliability and modeling. Since there is a drastic difference between IC fabrication and power electronic packaging, the book systematically introduces typical power electronic packaging design, assembly, reliability and failure analysis and material selection so readers can clearly understand each task's unique characteristics. Power electronic packaging is one of the fastest growing segments in the power electronic industry, due to the rapid growth of power integrated circuit (IC) fabrication, especially for applications like portable, consumer, home, computing and automotive electronics. This book also covers how advances in both semiconductor content and power advanced package design have helped cause advances in power device capability in recent years. The author extrapolates the most recent trends in the book's areas of focus to highlight where further improvement in materials and techniques can drive continued advancements, particularly in thermal management, usability, efficiency, reliability and overall cost of power semiconductor solutions.

Design and Characterization of High-temperature Packaging for Wide-bandgap Semiconductor Devices

Design and Characterization of High-temperature Packaging for Wide-bandgap Semiconductor Devices
Author: Brian J. Grummel
Publisher:
Total Pages: 140
Release: 2012
Genre:
ISBN:

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This was confirmed by electrical resistivity measurement, EDS, FIB, and SEM characterization. Thermal and mechanical characterization of TLP die-attached samples was also performed to gain a newfound understanding of the relationship between TLP design parameters and die-attach properties. Samples with a SiC diode chip TLP bonded to a copper metalized silicon nitride substrate were made using several different values of fabrication parameters such as gold and indium thickness, Au-In ratio, and bonding pressure. The TLP bonds were then characterized for die-attach voiding, shear strength, and thermal impedance. It was found that TLP die-attach offers high average shear force strength of 22.0 kgf and a low average thermal impedance of 0.35 K/W from the device junction to the substrate. The influence of various fabrication parameters on the bond characteristics were also compared, providing information necessary for implementing TLP die-attach into power electronic modules for high-temperature applications. The outcome of the investigation on TLP bonding techniques was incorporated into a new power module design utilizing TLP bonding. A full half-bridge inverter power module for low-power space applications has been designed and analyzed with extensive finite element thermo-mechanical modeling. In summary, TLP die-attach has investigated to confirm its reliability and to understand how to design effective TLP bonds, this information has been used to design a new high-temperature power electronic module.

High-Performance Packaging Technology for Wide Bandgap Semiconductor Modules

High-Performance Packaging Technology for Wide Bandgap Semiconductor Modules
Author: Paul Mumby-Croft
Publisher:
Total Pages:
Release: 2018
Genre: Technology
ISBN:

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The properties of wide band gap (WBG) semiconductors are beneficial to power electronics applications ranging from consumer electronics and renewable energy to electric vehicles and high-power traction applications like high-speed trains. WBG devices, properly integrated, will allow power electronics systems to be smaller, lighter, operate at higher temperatures, and at higher frequencies than previous generations of Si-based systems. These will contribute to higher efficiency, and therefore, lower lifecycle costs and lower CO2 emissions. Over 20 years have been spent developing WBG materials, low-defect-density wafers, epitaxy, and device fabrication and processing technology. In power electronics applications, devices are normally packaged into large integrated modules with electrical, mechanical and thermal connection to the system and control circuit. The first generations of WBG device have used conventional or existing module designs to allow drop-in replacement of Si devices; this approach limits the potential benefit. To realize the full potential of WBG devices, especially the higher operating temperatures and faster switching frequency, a new generation of packaging design and technology concepts must be widely implemented.

Wafer-Level Chip-Scale Packaging

Wafer-Level Chip-Scale Packaging
Author: Shichun Qu
Publisher: Springer
Total Pages: 336
Release: 2014-09-10
Genre: Technology & Engineering
ISBN: 1493915568

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Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Since the analog and power electronic wafer level packaging is different from regular digital and memory IC package, this book will systematically introduce the typical analog and power electronic wafer level packaging design, assembly process, materials, reliability and failure analysis, and material selection. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical and stress modeling methodologies is also presented in the book.

Technology Report - Current Developments in 3D Power Packaging with Focus on Embedded Substrate Technologies (2015)

Technology Report - Current Developments in 3D Power Packaging with Focus on Embedded Substrate Technologies (2015)
Author:
Publisher:
Total Pages:
Release: 2015-03-10
Genre:
ISBN: 9780991564460

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This report is the Phase 2 report on 3D packaging of power sources and is a follow up to the previous report published by the PSMA Packaging Committee. The report begins with a discussion of PCB embedding technologies which are now in high volume production and together with 3D packaging technology predominately provide a significant performance and size reduction enhancement opportunity rather than a means to reduce costs. Also presented is information on high temperature die and component attachment technologies that are evolving rapidly in the research labs. However, high power-density component embedding and 3D packaging of power semiconductors also have to overcome a 'thermal barrier" - since it is more challenging to remove heat generated within the body of a 3D integrated system than from a planar surface. To execute an embedded power design is very dependent on the availability of passive components optimized for PCB embedding and the report includes some of the available sources. The report also includes the results of a worldwide literature search of R&D published by participating organizations. These technologies, combined with wide-bandgap semiconductor devices will literally re-vitalize the entire power electronics infrastructure block by block, module by module, for the twenty-first century.

High Temperature Packaging for Wide Bandgap Semiconductor Devices

High Temperature Packaging for Wide Bandgap Semiconductor Devices
Author: Brian J. Grummel
Publisher:
Total Pages: 107
Release: 2008
Genre: Electronic packaging
ISBN:

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Currently, wide bandgap semiconductor devices feature increased efficiency, higher current handling capabilities, and higher reverse blocking voltages than silicon devices while recent fabrication advances have them drawing near to the marketplace. However these new semiconductors are in need of new packaging that will allow for their application in several important uses including hybrid electrical vehicles, new and existing energy sources, and increased efficiency in multiple new and existing technologies. Also, current power module designs for silicon devices are rife with problems that must be enhanced to improve reliability. This thesis introduces new packaging that is thermally resilient and has reduced mechanical stress from temperature rise that also provides increased circuit lifetime and greater reliability for continued use to 300°C which is within operation ratings of these new semiconductors. The new module is also without problematic wirebonds that lead to a majority of traditional module failures which also introduce parasitic inductance and increase thermal resistance. Resultantly, the module also features a severely reduced form factor in mass and volume.