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| Author | : George Chien |
| Publisher | : |
| Total Pages | : 388 |
| Release | : 2000 |
| Genre | : |
| ISBN | : |
| Author | : George Chien |
| Publisher | : |
| Total Pages | : 350 |
| Release | : 2000 |
| Genre | : |
| ISBN | : |
| Author | : Mohammad Farazian |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 158 |
| Release | : 2012-10-12 |
| Genre | : Technology & Engineering |
| ISBN | : 1461404894 |
Overcoming the agility limitations of conventional frequency synthesizers in multi-band OFDM ultra wideband is a key research goal in digital technology. This volume outlines a frequency plan that can generate all the required frequencies from a single fixed frequency, able to implement center frequencies with no more than two levels of SSB mixing. It recognizes the need for future synthesizers to bypass on-chip inductors and operate at low voltages to enable the increased integration and efficiency of networked appliances. The author examines in depth the architecture of the dividers that generate the necessary frequencies from a single base frequency and are capable of establishing a fractional division ratio. Presenting the first CMOS inductorless single PLL 14-band frequency synthesizer for MB-OFDMUWB makes this volume a key addition to the literature, and with the synthesizer capable of arbitrary band-hopping in less than two nanoseconds, it operates well within the desired range on a 1.2-volt power supply. The author’s close analysis of the operation, stability, and phase noise of injection-locked regenerative frequency dividers will provide researchers and technicians with much food for developmental thought.
| Author | : Ali Hajimiri |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 214 |
| Release | : 2007-05-08 |
| Genre | : Technology & Engineering |
| ISBN | : 0306481995 |
It is hardly a revelation to note that wireless and mobile communications have grown tremendously during the last few years. This growth has placed stringent requi- ments on channel spacing and, by implication, on the phase noise of oscillators. C- pounding the challenge has been a recent drive toward implementations of transceivers in CMOS, whose inferior 1/f noise performance has usually been thought to disqualify it from use in all but the lowest-performance oscillators. Low noise oscillators are also highly desired in the digital world, of course. The c- tinued drive toward higher clock frequencies translates into a demand for ev- decreasing jitter. Clearly, there is a need for a deep understanding of the fundamental mechanisms g- erning the process by which device, substrate, and supply noise turn into jitter and phase noise. Existing models generally offer only qualitative insights, however, and it has not always been clear why they are not quantitatively correct.
| Author | : Keliu Shu |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 227 |
| Release | : 2006-01-20 |
| Genre | : Technology & Engineering |
| ISBN | : 0387236694 |
Thanks to the advance of semiconductor and communication technology, the wireless communication market has been booming in the last two decades. It evolved from simple pagers to emerging third-generation (3G) cellular phones. In the meanwhile, broadband communication market has also gained a rapid growth. As the market always demands hi- performance and low-cost products, circuit designers are seeking hi- integration communication devices in cheap CMOS technology. The phase-locked loop frequency synthesizer is a critical component in communication devices. It works as a local oscillator for frequency translation and channel selection in wireless transceivers and broadband cable tuners. It also plays an important role as the clock synthesizer for data converters in the analog-and-digital signal interface. This book covers the design and analysis of PLL synthesizers. It includes both fundamentals and a review of the state-of-the-art techniques. The transient analysis of the third-order charge-pump PLL reveals its locking behavior accurately. The behavioral-level simulation of PLL further clarifies its stability limit. Design examples are given to clearly illustrate the design procedure of PLL synthesizers. A complete derivation of reference spurs in the charge-pump PLL is also presented in this book. The in-depth investigation of the digital CA modulator for fractional-N synthesizers provides insightful design guidelines for this important block.
| Author | : Jacques Christophe Rudell |
| Publisher | : |
| Total Pages | : 690 |
| Release | : 2000 |
| Genre | : |
| ISBN | : |
| Author | : Yannan Miao |
| Publisher | : LAP Lambert Academic Publishing |
| Total Pages | : 152 |
| Release | : 2012 |
| Genre | : |
| ISBN | : 9783659232190 |
With rapid development in the area of RF and wireless communication, the interest in frequency synthesizers has grown rapidly in the last few years. Frequency synthesizer is used for local oscillator (LO) generation. In this thesis, our aim is to explore high-frequency low-power LO generation in CMOS technology. We focus on three most power-hungry blocks in a frequency synthesizer, which dominate the total power consumption due to their high-frequency operation, namely voltage-controlled oscillator (VCO), frequency divider and frequency multiplier, as these circuits are the bottleneck to achieve the above mentioned aim. Through reducing their power consumption, the total power consumption of the frequency synthesizer can be reduced significantly. Moreover, the phase noise of the frequency synthesizer is significantly dependent on the VCO and the frequency multiplier. These novel ideas are implemented in a 24-GHz frequency synthesizer. These designs should help those IC designers, who may be considering improving the performance of transceiver.
| Author | : Li Lin |
| Publisher | : |
| Total Pages | : 226 |
| Release | : 2000 |
| Genre | : |
| ISBN | : |
| Author | : Margarita N. Favorskaya |
| Publisher | : Springer Nature |
| Total Pages | : 463 |
| Release | : 2021-04-21 |
| Genre | : Technology & Engineering |
| ISBN | : 3030654079 |
This book aims to bring together Researchers, Scientists, Engineers, Scholars and Students in the areas of computer engineering and information technology, and provides a forum for the dissemination of original research results, new ideas, Research and development, practical experiments, which concentrate on both theory and practices, for the benefit of the society. The book also provides a premier interdisciplinary platform for researchers, practitioners and educators to present and discuss the most recent innovations, trends, and concerns as well as practical challenges encountered and solutions adopted in the fields of Computer Science and Information Technology in the context of Distributed computing, Big data, High performance computing, Internet-of-Things, and digital pedagogy. It is becoming increasingly important to develop adaptive, intelligent computing-centric, energy-aware, secure and privacy-aware mechanisms in high performance computing and IoT applications. This book aspires to convey researchers’ experiences, to present excellent result analysis, future scopes, and challenges facing the field of computer science, information technology, telecommunication, and digital pedagogy. This book aims to attract researchers and practitioners who are working in Information Technology and Computer Science. This book is about basics and high level concepts regarding intelligent computing paradigm, communications, and digital learning process. The book serves as a useful guide for Undergraduates, Postgraduates and Research Scholar in the field of Computer Science, Information Technology, and Electronics Engineering. We believe that this volume not only presents novel and interesting ideas but also will stimulate interesting discussions from the participants and inspire new ideas.
| Author | : Golsa Ghiaasi-Hafezi |
| Publisher | : |
| Total Pages | : |
| Release | : 2009 |
| Genre | : |
| ISBN | : |
Abstract: In this thesis the design of low phase noise frequency synthesizers for emerging wireless applications is investigated. The future wireless applications employ Orthogonal Frequency Division Multiplexing (OFDM) in order to combat the harsh mobile environment effects on the signal, such as Doppler effect or Multi-path fading. However, OFDM imposes the stringent integrated phase noise requirement to maintain the orthogonality of the subcarriers. The emerging applications also require broadband functionality to cover the multiple bands specified by different application using a single frequency synthesizer. Particularly, this thesis focuses on the design of SD fractional-N frequency synthesizers for OFDM based applications. SD fractional-N PLLs have proven to be a very good candidate for the emerging OFDM-based radios which require employment of fast switching low phase noise frequency synthesizers. The issue of spectral Purity in SD PLLs is discussed, and the issue of phase noise and fractional spurs is investigated. Considering the loop dynamics, the optimal design for low phase noise is described. The problem of noise folding and its impact on spur cancellation is studied. A type-I second order PLL is designed which inherently eliminates the sources of nonlinearity in the signal path. The LO generation scheme is proposed to cover the three bands of WiMAX application centered at 2.5, 3.5 and 5.5 GHz by utilizing a broadband PLL. The design employs a uniformly sampled two state PFD and a discrete on-chip filter. A cancellation DAC in embedded in the PFD which is used to cancel out the phase induced by quantization error. The design enhances the noise folding and spur performance and satisfies the stringent integrated phase noise requirement of the application. As a critical part of the top-down design, a system study for a dual-band DVB-H tuner is presented. The tuner's various requirements in terms of linearity, gain and noise are derived. The required of phase noise of the PLL is calculated on the basis of the blocker profile of the tuner. The direct conversion architecture is adopted for the design and the specification of various blocks in the radio is derived in order to satisfy the required performance. The LO generation scheme for dual band local oscillator is proposed. Finally, the design of key circuits in the PLL loop is presented. The wideband VCO for triple WiMAX application is utilizing an amplitude regulation scheme to minimize supply pushing and improve the spectral purity. The high-speed multi-modulus divider design is presented. The design of high-speed broadband divide-by-32/33 dual modulus prescaler is described.
