Logic Non-volatile Memory: The Nvm Solutions For Ememory

Logic Non-volatile Memory: The Nvm Solutions For Ememory
Author: Charles Ching-hsiang Hsu
Publisher: World Scientific
Total Pages: 319
Release: 2014-03-18
Genre: Technology & Engineering
ISBN: 9814460923

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Would you like to add the capabilities of the Non-Volatile Memory (NVM) as a storage element in your silicon integrated logic circuits, and as a trimming sector in your high voltage driver and other silicon integrated analog circuits? Would you like to learn how to embed the NVM into your silicon integrated circuit products to improve their performance?This book is written to help you.It provides comprehensive instructions on fabricating the NVM using the same processes you are using to fabricate your logic integrated circuits. We at our eMemory company call this technology the embedded Logic NVM. Because embedded Logic NVM has simple fabrication processes, it has replaced the conventional NVM in many traditional and new applications, including LCD driver, LED driver, MEMS controller, touch panel controller, power management unit, ambient and motion sensor controller, micro controller unit (MCU), security ID setting tag, RFID, NFC, PC camera controller, keyboard controller, and mouse controller. The recent explosive growth of the Logic NVM indicates that it will soon dominate all NVM applications. The embedded Logic NVM was invented and has been implemented in users' applications by the 200+ employees of our eMemory company, who are also the authors and author-assistants of this book.This book covers the following Logic NVM products: One Time Programmable (OTP) memory, Multiple Times Programmable (MTP) memory, Flash memory, and Electrically Erasable Programmable Read Only Memory (EEPROM). The fundamentals of the NVM are described in this book, which include: the physics and operations of the memory transistors, the basic building block of the memory cells and the access circuits.All of these products have been used continuously by the industry worldwide. In-depth readers can attain expert proficiency in the implementation of the embedded Logic NVM technology in their products.

Logic Non-volatile Memory

Logic Non-volatile Memory
Author: Charles Ching-Hsiang Hsu
Publisher:
Total Pages: 274
Release: 2014
Genre: Integrated circuits
ISBN: 9789814596350

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Design Rules in a Semiconductor Foundry

Design Rules in a Semiconductor Foundry
Author: Eitan N. Shauly
Publisher: CRC Press
Total Pages: 831
Release: 2022-11-30
Genre: Technology & Engineering
ISBN: 1000631354

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Nowadays over 50% of integrated circuits are fabricated at wafer foundries. This book presents a foundry-integrated perspective of the field and is a comprehensive and up-to-date manual designed to serve process, device, layout, and design engineers. It comprises chapters carefully selected to cover topics relevant for them to deal with their work. The book provides an insight into the different types of design rules (DRs) and considerations for setting new DRs. It discusses isolation, gate patterning, S/D contacts, metal lines, MOL, air gaps, and so on. It explains in detail the layout rules needed to support advanced planarization processes, different types of dummies, and related utilities as well as presents a large set of guidelines and layout-aware modeling for RF CMOS and analog modules. It also discusses the layout DRs for different mobility enhancement techniques and their related modeling, listing many of the dedicated rules for static random-access memory (SRAM), embedded polyfuse (ePF), and LogicNVM. The book also provides the setting and calibration of the process parameters set and describes the 28~20 nm planar MOSFET process flow for low-power and high-performance mobile applications in a step-by-step manner. It includes FEOL and BEOL physical and environmental tests for qualifications together with automotive qualification and design for automotive (DfA). Written for the professionals, the book belongs to the bookshelf of microelectronic discipline experts.

2016 5th Non Volatile Memory Systems and Applications Symposium (NVMSA)

2016 5th Non Volatile Memory Systems and Applications Symposium (NVMSA)
Author: IEEE Staff
Publisher:
Total Pages:
Release: 2016-08-17
Genre:
ISBN: 9781509041374

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Device Circuit design of NVMs Emerging Non volatile Memory Circuit Design NVM Device Design Error correction for NVMs Nonvolatile Logic Circuit Design Low Power NVM Circuit NVM Architecture and Systems Non volatile Registers Non volatile Memory Architectures Non volatile Cache Design NVM based Neuromorphic Architectures NVM based Storage NVDIMM NVM Storage Operating System Support for NVM Compiler Optimization for NVM NVM based Storage Software NVM based Databases NVM Controller Design NVM Applications In memory Computing NVM for Big Data Analytics NVM in Mobile Healthcare Applications NVM in Wearable Applications NVM and the Internet of Things

Runtime Data Management on Non-volatile Memory-based High Performance Systems

Runtime Data Management on Non-volatile Memory-based High Performance Systems
Author: Kai Wu
Publisher:
Total Pages: 312
Release: 2021
Genre:
ISBN:

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Byte-addressable non-volatile memories (NVM) have been envisioned as a new tier in computer systems, providing memory-like performance and storage-level capacity and persistence. Because of the relatively high latency and low bandwidth of NVM (comparing with dynamic random-access memory (DRAM)), NVM is often paired with DRAM to build a heterogeneous main memory system (HMS). As a result, application data must be carefully placed to NVM and DRAM for best performance. Moreover, in a NVM-based HMS, data on NVM is not lost when the system crashes because of the non-volatility nature of NVM. However, because of the volatile caches and the processor's reordering of instructions, data must be logged in failure-atomic transactions and explicitly flushed from caches into NVM to ensure consistency and correctness before crashes, which can cause large runtime overhead. This dissertation focuses on building lightweight runtime systems on the NVM-based HMS to effectively manage data placement and data crash consistency. This dissertation first studies the data placement of two types of high performance computing (HPC) applications on NVM-based HMS (i.e., message passing interface (MPI) programs and task-parallel programs). The dissertation presents the Unimem and Tahoe runtimes to implement automatic and transparent data placement on NVM-based HMS for MVM-based applications and task-parallel applications, respectively .Failure-atomic transactions are a critical mechanism for accessing and manipulating data on NVM with crash consistency. This dissertation then investigates performance problems in common transaction implementations on real NVM hardware and highlights the importance of considering NVM architecture characteristics for transaction performance. The dissertation presents ArchTM, an architecture-aware NVM transaction system. Finally, this dissertation analyzes the cache line flushing (CLF) mechanism, which is a fundamental building block for programming NVM to ensure crash consistency. This dissertation designs and implements Ribbon to optimize CLF mechanisms through a decoupled concurrency control and proactive CLF to change cache line status. Ribbon also uses cache line coalescing as an application-specific solution for those with low dirtiness in flushed cache lines.

Providing Easy to Use and Fast Programming Support for Non-Volatile Memories

Providing Easy to Use and Fast Programming Support for Non-Volatile Memories
Author: Amirsaman Memaripour
Publisher:
Total Pages: 136
Release: 2019
Genre:
ISBN:

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Non-Volatile Memory (NVM) technologies, such as 3D XPoint, offer DRAM-like performance and byte-addressable access to persistent data. NVMs promise an opportunity for fast, persistent data structures, and a wide range of applications stand to benefit from the performance potential of these technologies. These potential benefits are greatest when applications access NVM directly via load/store instructions rather than conventional file-based interfaces. Directly accessing NVM presents several challenges. In particular, applications need guaranteed consistency and safety semantics to protect their data structures in the face of system failures and programming errors. Implementing data structures that meet these requirements is challenging and error-prone. Existing methods for building persistent data structures require either in-depth code changes to an existing data structure or rewriting the data structure from scratch. Unfortunately, both of these methods are labor-intensive and error-prone. Failure-atomicity libraries and programming language extensions can simplify this task. However, all the proposed solutions either require pervasive changes to existing software or incur unacceptable overheads to runtime performance. As a result, porting legacy applications to leverage NVM is likely to be prohibitively difficult and time-consuming. This dissertation first presents Breeze, an NVM toolchain that minimizes the changes necessary to enable legacy code to reap the benefits of directly accessing NVM. In contrast to PMDK and NVM-Direct, Breeze reduces the programming effort of porting Memcached and MongoDB by up to 2.8×, while providing equal or superior performance. Second, it introduces NVHooks, a compiler that automatically annotates NVM accesses and avoids disruptive and error-prone changes to programs. NVHooks reduces the cost of these annotations by applying novel, NVM-specific optimizations to their placement. For our tested benchmarks, NVHooks matches the performance of hand-annotated code while minimizing programmer effort. Finally, it presents Pronto, a new NVM library that reduces the programming effort required to add persistence to volatile data structures. Pronto uses asynchronous semantic logging (ASL) to allow adding persistence to the existing volatile data structure (e.g., C++ Standard Template Library containers) with minor programming effort. ASL moves most durability code off the critical path. Our evaluation shows Pronto data structures outperform highly-optimized NVM data structures by a large margin.

Embedded Flash Memory for Embedded Systems: Technology, Design for Sub-systems, and Innovations

Embedded Flash Memory for Embedded Systems: Technology, Design for Sub-systems, and Innovations
Author: Hideto Hidaka
Publisher: Springer
Total Pages: 253
Release: 2017-09-09
Genre: Technology & Engineering
ISBN: 3319553062

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This book provides a comprehensive introduction to embedded flash memory, describing the history, current status, and future projections for technology, circuits, and systems applications. The authors describe current main-stream embedded flash technologies from floating-gate 1Tr, floating-gate with split-gate (1.5Tr), and 1Tr/1.5Tr SONOS flash technologies and their successful creation of various applications. Comparisons of these embedded flash technologies and future projections are also provided. The authors demonstrate a variety of embedded applications for auto-motive, smart-IC cards, and low-power, representing the leading-edge technology developments for eFlash. The discussion also includes insights into future prospects of application-driven non-volatile memory technology in the era of smart advanced automotive system, such as ADAS (Advanced Driver Assistance System) and IoE (Internet of Everything). Trials on technology convergence and future prospects of embedded non-volatile memory in the new memory hierarchy are also described. Introduces the history of embedded flash memory technology for micro-controller products and how embedded flash innovations developed; Includes comprehensive and detailed descriptions of current main-stream embedded flash memory technologies, sub-system designs and applications; Explains why embedded flash memory requirements are different from those of stand-alone flash memory and how to achieve specific goals with technology development and circuit designs; Describes a mature and stable floating-gate 1Tr cell technology imported from stand-alone flash memory products - that then introduces embedded-specific split-gate memory cell technologies based on floating-gate storage structure and charge-trapping SONOS technology and their eFlash sub-system designs; Describes automotive and smart-IC card applications requirements and achievements in advanced eFlash beyond 4 0nm node.

Nonvolatile Memory Technologies with Emphasis on Flash

Nonvolatile Memory Technologies with Emphasis on Flash
Author: Joe Brewer
Publisher: John Wiley & Sons
Total Pages: 766
Release: 2011-09-23
Genre: Technology & Engineering
ISBN: 1118211626

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Presented here is an all-inclusive treatment of Flash technology, including Flash memory chips, Flash embedded in logic, binary cell Flash, and multilevel cell Flash. The book begins with a tutorial of elementary concepts to orient readers who are less familiar with the subject. Next, it covers all aspects and variations of Flash technology at a mature engineering level: basic device structures, principles of operation, related process technologies, circuit design, overall design tradeoffs, device testing, reliability, and applications.

Emerging Non-volatile Memory Technologies

Emerging Non-volatile Memory Technologies
Author: Wen Siang Lew
Publisher: Springer Nature
Total Pages: 439
Release: 2021-01-09
Genre: Science
ISBN: 9811569126

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This book offers a balanced and comprehensive guide to the core principles, fundamental properties, experimental approaches, and state-of-the-art applications of two major groups of emerging non-volatile memory technologies, i.e. spintronics-based devices as well as resistive switching devices, also known as Resistive Random Access Memory (RRAM). The first section presents different types of spintronic-based devices, i.e. magnetic tunnel junction (MTJ), domain wall, and skyrmion memory devices. This section describes how their developments have led to various promising applications, such as microwave oscillators, detectors, magnetic logic, and neuromorphic engineered systems. In the second half of the book, the underlying device physics supported by different experimental observations and modelling of RRAM devices are presented with memory array level implementation. An insight into RRAM desired properties as synaptic element in neuromorphic computing platforms from material and algorithms viewpoint is also discussed with specific example in automatic sound classification framework.