Algorithms and Architectures for Cryptography and Source Coding in Non-Volatile Flash Memories

Algorithms and Architectures for Cryptography and Source Coding in Non-Volatile Flash Memories
Author: Malek Safieh
Publisher:
Total Pages: 0
Release: 2021
Genre:
ISBN: 9783658344603
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In this work, algorithms and architectures for cryptography and source coding are developed, which are suitable for many resource-constrained embedded systems such as non-volatile flash memories. A new concept for elliptic curve cryptography is presented, which uses an arithmetic over Gaussian integers. Gaussian integers are a subset of the complex numbers with integers as real and imaginary parts. Ordinary modular arithmetic over Gaussian integers is computational expensive. To reduce the complexity, a new arithmetic based on the Montgomery reduction is presented. For the elliptic curve point multiplication, this arithmetic over Gaussian integers improves the computational efficiency, the resistance against side channel attacks, and reduces the memory requirements. Furthermore, an efficient variant of the Lempel-Ziv-Welch (LZW) algorithm for universal lossless data compression is investigated. Instead of one LZW dictionary, this algorithm applies several dictionaries to speed up the encoding process. Two dictionary partitioning techniques are introduced that improve the compression rate and reduce the memory size of this parallel dictionary LZW algorithm. About the Author Malek Safieh is a research scientist in the field of cryptography and data compression.

Algorithms and Architectures for Cryptography and Source Coding in Non-Volatile Flash Memories

Algorithms and Architectures for Cryptography and Source Coding in Non-Volatile Flash Memories
Author: Malek Safieh
Publisher: Springer Nature
Total Pages: 155
Release: 2021-08-09
Genre: Computers
ISBN: 3658344598
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In this work, algorithms and architectures for cryptography and source coding are developed, which are suitable for many resource-constrained embedded systems such as non-volatile flash memories. A new concept for elliptic curve cryptography is presented, which uses an arithmetic over Gaussian integers. Gaussian integers are a subset of the complex numbers with integers as real and imaginary parts. Ordinary modular arithmetic over Gaussian integers is computational expensive. To reduce the complexity, a new arithmetic based on the Montgomery reduction is presented. For the elliptic curve point multiplication, this arithmetic over Gaussian integers improves the computational efficiency, the resistance against side channel attacks, and reduces the memory requirements. Furthermore, an efficient variant of the Lempel-Ziv-Welch (LZW) algorithm for universal lossless data compression is investigated. Instead of one LZW dictionary, this algorithm applies several dictionaries to speed up the encoding process. Two dictionary partitioning techniques are introduced that improve the compression rate and reduce the memory size of this parallel dictionary LZW algorithm.

Channel and Source Coding for Non-Volatile Flash Memories

Channel and Source Coding for Non-Volatile Flash Memories
Author: Mohammed Rajab
Publisher: Springer Nature
Total Pages: 143
Release: 2020-01-02
Genre: Computers
ISBN: 3658289821
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Mohammed Rajab proposes different technologies like the error correction coding (ECC), sources coding and offset calibration that aim to improve the reliability of the NAND flash memory with low implementation costs for industrial application. The author examines different ECC schemes based on concatenated codes like generalized concatenated codes (GCC) which are applicable for NAND flash memories by using the hard and soft input decoding. Furthermore, different data compression schemes are examined in order to reduce the write amplification effect and also to improve the error correct capability of the ECC by combining both schemes.

Embedded Systems Architecture

Embedded Systems Architecture
Author: Daniele Lacamera
Publisher: Packt Publishing Ltd
Total Pages: 342
Release: 2023-01-13
Genre: Computers
ISBN: 1803242051
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Design safe and reliable software for embedded systems and explore the internals of device drivers, RTOS, and TEE Key Features Identify and overcome challenges in embedded environments Understand and implement the steps required to increase the security of IoT solutions Build safety-critical and memory-safe parallel and distributed embedded systems Book DescriptionEmbedded Systems Architecture begins with a bird’s-eye view of embedded development and how it differs from the other systems that you may be familiar with. This book will help you get the hang of the internal working of various components in real-world systems. You’ll start by setting up a development environment and then move on to the core system architectural concepts, exploring system designs, boot-up mechanisms, and memory management. As you progress through the topics, you’ll explore the programming interface and device drivers to establish communication via TCP/IP and take measures to increase the security of IoT solutions. Finally, you’ll be introduced to multithreaded operating systems through the development of a scheduler and the use of hardware-assisted trusted execution mechanisms. With the help of this book, you will gain the confidence to work with embedded systems at an architectural level and become familiar with various aspects of embedded software development on microcontrollers—such as memory management, multithreading, and RTOS—an approach oriented to memory isolation.What you will learn Participate in the design and definition phase of an embedded product Get to grips with writing code for ARM Cortex-M microcontrollers Build an embedded development lab and optimize the workflow Secure embedded systems with TLS Demystify the architecture behind the communication interfaces Understand the design and development patterns for connected and distributed devices in the IoT Master multitasking parallel execution patterns and real-time operating systems Become familiar with Trusted Execution Environment (TEE) Who this book is for If you're a software developer or designer looking to learn about embedded programming, this is the book for you. You’ll also find this book useful if you’re a beginner or a less experienced embedded programmer on a quest to expand your knowledge on embedded systems.

Coding for Flash Memories

Coding for Flash Memories
Author: Eitan Yaakobi
Publisher:
Total Pages: 164
Release: 2011
Genre:
ISBN: 9781124801131
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Flash memories are, by far, the most important type of non-volatile memory in use today. They are employed widely in mobile, embedded, and mass-storage applications, and the growth in this sector continues at a staggering pace. Moreover, since flash memories do not suffer from the mechanical limitations of magnetic disk drives, solid-state drives have the potential to upstage the magnetic recording industry in the foreseeable future. The research goal of this dissertation is the discovery of new coding theory methods that supports efficient design of flash memories. Flash memory is comprised of blocks of cells, wherein each cell can take on q>̲ 2 levels. While increasing the cell level is easy, reducing its level can be accomplished only by erasing an entire block. Such block erasures are not only time-consuming, but also degrade the memory lifetime. Our main contribution in this research is the design of rewriting codes that maximize the number of times that information can be written prior to incurring a block erasure. Examples of such coding schemes are flash/floating codes and buffer codes, introduced by Jiang and Bruck et al. in 2007, and WOM-codes that were presented by Rivest and Shamir almost three decades ago. The overall goal in these codes is to maximize the amount of information written to a fixed number of cells in a fixed number of writes. Furthermore, the design of error-correcting codes in flash memories is extensively studied. It is shown how to modify WOM-codes to support an error-correction capability. Motivated by the asymmetry of the error behavior of flash memories and the work by Cassuto et al., a coding scheme to correct asymmetric errors is presented. An extensive empirical database of errors was used to develop a comprehensive understanding of the error behavior as well as to design specific error-correcting codes for flash memories. This research on flash memories is expanded to other directions. Wear leveling techniques are widely used in flash memories in order to reduce and balance block erasures. It is shown that coding schemes to be used in these techniques can significantly reduce the number block erasures incurred during data movement. Also, the design of parallel cell programming algorithms is studied for the specific constraints and behavior of flash cells.

Coding Techniques for Error Correction and Rewriting in Flash Memories

Coding Techniques for Error Correction and Rewriting in Flash Memories
Author: Shoeb Ahmed Mohammed
Publisher:
Total Pages:
Release: 2010
Genre:
ISBN:
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Flash memories have become the main type of non-volatile memories. They are widely used in mobile, embedded and mass-storage devices. Flash memories store data in floating-gate cells, where the amount of charge stored in cells 0́3 called cell levels 0́3 is used to represent data. To reduce the level of any cell, a whole cell block (about 106 cells) must be erased together and then reprogrammed. This operation, called block erasure, is very costly and brings significant challenges to cell programming and rewriting of data. To address these challenges, rank modulation and rewriting codes have been proposed for reliably storing and modifying data. However, for these new schemes, many problems still remain open. In this work, we study error-correcting rank-modulation codes and rewriting codes for flash memories. For the rank modulation scheme, we study a family of one- error-correcting codes, and present efficient encoding and decoding algorithms. For rewriting, we study a family of linear write-once memory (WOM) codes, and present an effective algorithm for rewriting using the codes. We analyze the performance of our solutions for both schemes.

Intelligent Computing

Intelligent Computing
Author: Kohei Arai
Publisher: Springer Nature
Total Pages: 1108
Release: 2021-07-05
Genre: Technology & Engineering
ISBN: 3030801292
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This book is a comprehensive collection of chapters focusing on the core areas of computing and their further applications in the real world. Each chapter is a paper presented at the Computing Conference 2021 held on 15-16 July 2021. Computing 2021 attracted a total of 638 submissions which underwent a double-blind peer review process. Of those 638 submissions, 235 submissions have been selected to be included in this book. The goal of this conference is to give a platform to researchers with fundamental contributions and to be a premier venue for academic and industry practitioners to share new ideas and development experiences. We hope that readers find this volume interesting and valuable as it provides the state-of-the-art intelligent methods and techniques for solving real-world problems. We also expect that the conference and its publications is a trigger for further related research and technology improvements in this important subject.

Emerging Non-Volatile Memories

Emerging Non-Volatile Memories
Author: Seungbum Hong
Publisher: Springer
Total Pages: 280
Release: 2014-11-18
Genre: Technology & Engineering
ISBN: 1489975373
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This book is an introduction to the fundamentals of emerging non-volatile memories and provides an overview of future trends in the field. Readers will find coverage of seven important memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), Multiferroic RAM (MFRAM), Phase-Change Memories (PCM), Oxide-based Resistive RAM (RRAM), Probe Storage, and Polymer Memories. Chapters are structured to reflect diffusions and clashes between different topics. Emerging Non-Volatile Memories is an ideal book for graduate students, faculty, and professionals working in the area of non-volatile memory. This book also: Covers key memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), and Multiferroic RAM (MFRAM), among others. Provides an overview of non-volatile memory fundamentals. Broadens readers’ understanding of future trends in non-volatile memories.

3D Flash Memories

3D Flash Memories
Author: Rino Micheloni
Publisher: Springer
Total Pages: 391
Release: 2016-05-26
Genre: Computers
ISBN: 9401775125
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This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.