The growing demand for battery-operated portable systems and power supply restrictions due to device scaling and reliability are major driving forces for development of low voltage/high current MOSFETs for VLSI technology. Reducing the power supply is a very effective way to reduce power consumption, hence increasing the device operating lifetime and relaxing the reliability constraints. The biggest challenge is to maintain high performance characteristics of the device, i.e. to prevent degradation of the device speed, by scaling down the device, thus lowering the threshold voltage and increasing the current-drive of the MOSFET. The contents of this document describe the major portion of experimental efforts and the subsequent results, of a project initiated by the Procter and Gamble Company with the intent of developing ultra low voltage power MOSFETs in collaboration with the University of Cincinnati. The specific objectives of the project are given below: 1. Full device characterization of existing state of the art power MOSFETs, verification and analysis and detailed understanding of the provided models and fitness comparison. 2. Parameter Extraction, model generation and comparison with obtained I-V characteristics. 3. Testing and full characterization of the lateral power MOSFET. 4. Investigation of the semiconductor physics for short channel, high current, low voltageMOSFETs and impact of sub 1V design on power MOSFET performance. 5. Parameter extraction and modeling of the developed device.